Objective Questions on Digital Electronics

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  1. Which of these sets of logic gates are designated as universal gates?

    Using any one of these 2 gates - NAND, NOR we can design all logic gates.

  2. Which one of the following is not a vectored interrupt?

    Here TRAP, INTR, RST 7.5 are vectored interrupt. But RST 3 is not a non vectored interrupt.

  3. The 2’s complement of the number of 1010101

    The binary number is 1010101. We know that 2’s complement = 1’s complement + 1. So 1’s complement of 1010101 is 0101011. Then add with 1 , we get 2’s complement 101011 + 1 = 0101011.

  4. In the toggle mode a JK flip-flop has

    J = 0, K = 0 - no change condition between pre-state and next state, J = 0, K = 1 - it is always reset condition means next state is always 0, J = 1, K = 0 - it is always set condition means next state is always 1, J = 1, K = 1 - it is toggle condition means when pre-state is 1 then next state is 0 or when pre-state is 0 then next state is 1.

  5. The resolution of a 12 bit analog to digital converter in percent in

    Under construction.

  6. What will be Excess - 3 code for decimal ( 584 )?

    5 8 4 + 3 3 3 = 8 11 7. Then 8 is a decimal no. So it is converted to binary when result is 1000, 11 convert to binary 1011, 7 convert to binary-0111. So result is (1000 1011 0111).

  7. The number of comparators in a parallel conversion type 8-bit analog to digital converter is

    Number of comparators = ( 2N - 1 ) = ( 212 - 1 ) = 255 ( N = no. of bits ).

  8. Excess 3 code is known as

    Complement of Excess 3 code is 9's complement of that digit in excess 3. So excess 3 code is also called self complementing code.

  9. 8085 microprocessor has how many pins

    Intel 8085 NMOS microprocessor is a 8 bit, 40 pins IC. It is a 40 pin I.C. package fabricated on a single LSI chip. The Intel 8085 uses a single + 5 V DC supply for its operation.Its clock speed is about 3 MHz.The clock cycle is 320 ns. It has 80 basic instructions and 246 opcodes.

  10. How many flip flops are required to build a binary counter circuit to count from 0 to 1023?

    Total count = 1024, 2N = 1024 or, 2N = 210 or, N = 10 (no. of flip flops).

  11. In 8085 microprocessor, the RST6 instruction transfer programme execution to following location

    6 × 8 = ( 48 )10 = 0030H.

  12. HLT opcode means

    HLT opcode in 8085 microprocessor means end of program.

  13. In flip flop clock is present but in latch clock is

    Synchronous circuits change their states only when clock pulses are present.The latch with additional control input ( clock, enable input) is called flip flop.

  14. Counter is a

    A counter is a sequential circuit that keeps a record of the clock pulses sent through it. Like a register, a counter also consists of a group of flip-flops. However, a counter has a characteristics internal sequence of states through which it passes when a series of clock pulses are fed to it. Counters are divided into categories : ripple ( or asynchronous ) counters and synchronous counters.

  15. The 2's complement of 17 is

    17 = 010001, 1's complement = 101110, 2's complement = 101111.

  16. 1’s complement of 17 is

    17 = 10001, 1's complement of 17 = 01110. For 1's complement 0 is written as 1 and 1 is written as 0.

  17. A 10 bit A/D conveter is used to digitize an analog signal in the 0 to 6 volt. The maximum peak to ripple voltage that can be allowed in the D.C. supply voltage is

    Smallest incremental change = 1 / 210 = 1 / 1024. So for 6 Volt incremental change = 6 / 1024 = 5.85 mV.

  18. If a counter having 10 flip flops is initially at 0, What count will if hold after 2060 pulses?

    In complete one cycle 1024 pulses 2060 / 1024 =2048 / 2 cycles, Balance = 2060 - 2040 = 12 pulses. Binary no. of 12 is = 000 000 1100

  19. A switch-tail ring counter is made by using a single D-FF, the following circuit is

    In a switch tail ring counter, using D FF, the complementary of output ( Q' ) is connected to D input for a single D-FF it becomes a T FF.

  20. The fast logic family is

    ECL ( Emitter coupled logic) is the fast logic family. Because the switching transistors do not go into saturation in either the on / off state. ECL is sensitive to a threshold level only.

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